HAL TIM initialization and configuration functions migration ¶
The goal of this page is to show how to migrate the initialization sequence using STM32CubeMX2:
Open STM32CubeMX2 TIM configuration panel.
Configure the SW layer HAL.
Configure the TIM main features.
Configure the TIM channels.
Configure the TIM advanced features.
Configure the TIM GPIO pins.
Configure the TIM DMA(s) if the application requires to use the TIM in DMA mode.
Configure the NVIC if the application requires the TIM to be used in IT mode.
Generate the code.
HAL TIM configuration panel ¶
Create a new project with the STM32CubeMX2, then start the initialization and the main configuration.
HAL TIM main features configuration ¶
Configure the TIM main features.
HAL TIM channels configuration ¶
Enable and configure the chosen TIM channel.
HAL TIM advanced features configuration ¶
Configure the advanced TIM features.
GPIO configuration ¶
Configure GPIO pins.
DMA configuration ¶
Configure the DMA for data reception as needed.
NVIC configuration ¶
Configure the NVIC in case of an interrupt.
Generated TIM initialization and de-initialization sequences ¶
The TIM initialization sequence is generated in the
mx_tim1_init
function in the
mx_tim1.c
file under
$YOUR_PROJECT_NAME$/$YOUR_PROJECT_NAME$_SW/generated/STM32Cube_CodeGen.
Related concepts:
|
Topic |
HAL1 Code Snippet |
HAL2 Code Snippet |
|---|---|---|
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Declaration of the handle |
TIM_HandleTypeDef htim1;
DMA_HandleTypeDef handle_GPDMA1_Channel0;
|
static hal_tim_handle_t hTIM1;
static hal_dma_handle_t hGPDMA1_CH0;
|
|
TIM initialization and configuration sequence. |
static void MX_TIM1_Init(void)
{
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
htim1.Instance = TIM1;
htim1.Init.Prescaler = 0;
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
htim1.Init.Period = 65535;
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim1.Init.RepetitionCounter = 0;
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
sBreakDeadTimeConfig.DeadTime = 0;
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
sBreakDeadTimeConfig.BreakFilter = 0;
sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
sBreakDeadTimeConfig.Break2Filter = 0;
sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
{
Error_Handler();
}
HAL_TIM_MspPostInit(&htim1);
}
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM1)
{
/* Peripheral clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
/* TIM1 DMA Init */
/* GPDMA1_REQUEST_TIM1_CH1 Init */
handle_GPDMA1_Channel0.Instance = GPDMA1_Channel0;
handle_GPDMA1_Channel0.Init.Request = GPDMA1_REQUEST_TIM1_CH1;
handle_GPDMA1_Channel0.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
handle_GPDMA1_Channel0.Init.Direction = DMA_PERIPH_TO_MEMORY;
handle_GPDMA1_Channel0.Init.SrcInc = DMA_SINC_FIXED;
handle_GPDMA1_Channel0.Init.DestInc = DMA_DINC_FIXED;
handle_GPDMA1_Channel0.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
handle_GPDMA1_Channel0.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
handle_GPDMA1_Channel0.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
handle_GPDMA1_Channel0.Init.SrcBurstLength = 1;
handle_GPDMA1_Channel0.Init.DestBurstLength = 1;
handle_GPDMA1_Channel0.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT0;
handle_GPDMA1_Channel0.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
handle_GPDMA1_Channel0.Init.Mode = DMA_NORMAL;
if (HAL_DMA_Init(&handle_GPDMA1_Channel0) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(htim_base, hdma[TIM_DMA_ID_CC1], handle_GPDMA1_Channel0);
if (HAL_DMA_ConfigChannelAttributes(&handle_GPDMA1_Channel0, DMA_CHANNEL_NPRIV) != HAL_OK)
{
Error_Handler();
}
/* TIM1 interrupt Init */
HAL_NVIC_SetPriority(TIM1_UP_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_UP_IRQn);
}
}
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(htim->Instance==TIM1)
{
__HAL_RCC_GPIOE_CLK_ENABLE();
/**TIM1 GPIO Configuration
PE9 ------> TIM1_CH1
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
}
}
|
hal_tim_handle_t *mx_tim1_init(void)
{
if (HAL_TIM_Init(&hTIM1, HAL_TIM1) != HAL_OK)
{
return NULL;
}
HAL_RCC_TIM1_EnableClock();
/* Timer configuration to reach the output frequency at 3906 Hz */
hal_tim_config_t config;
config.prescaler = 0;
config.counter_mode = HAL_TIM_COUNTER_UP;
config.period = 0xFFFF;
config.repetition_counter = 0;
config.clock_sel.clock_source = HAL_TIM_CLK_INTERNAL;
if (HAL_TIM_SetConfig(&hTIM1, &config) != HAL_OK)
{
return NULL;
}
/* Sampling Clock */
if (HAL_TIM_SetDTSPrescaler(&hTIM1, HAL_TIM_DTS_DIV1) != HAL_OK)
{
return NULL;
}
hal_tim_oc_channel_config_t oc_config;
oc_config.polarity = HAL_TIM_OC_HIGH;
oc_config.idle_state = HAL_TIM_OC_IDLE_STATE_RESET;
if (HAL_TIM_OC_SetConfigChannel(&hTIM1, HAL_TIM_CHANNEL_1, &oc_config) != HAL_OK)
{
return NULL;
}
hal_tim_oc_compare_unit_config_t oc_compare_unit_config;
oc_compare_unit_config.mode = HAL_TIM_OC_PWM1;
oc_compare_unit_config.pulse = 0x00000000;
if (HAL_TIM_OC_SetConfigCompareUnit(&hTIM1, hal_tim_oc_channel_to_compare_unit(HAL_TIM_CHANNEL_1),
&oc_compare_unit_config) != HAL_OK)
{
return NULL;
}
/* Update Event Management */
if (HAL_TIM_SetUpdateSource(&hTIM1, HAL_TIM_UPDATE_REGULAR) != HAL_OK)
{
return NULL;
}
if (HAL_TIM_EnableUpdateGeneration(&hTIM1) != HAL_OK)
{
return NULL;
}
/* Capture/Compare DMA request selection */
if (HAL_TIM_SetCaptureCompareDMAReqSource(&hTIM1, HAL_TIM_CC_DMAREQ_CC) != HAL_OK)
{
return NULL;
}
HAL_RCC_GPIOA_EnableClock();
hal_gpio_config_t gpio_config;
/**
TIM1 GPIO Configuration
[GPIO Pin] ------> [Signal Name]
PA8 ------> TIM1_CH1
**/
gpio_config.mode = HAL_GPIO_MODE_ALTERNATE;
gpio_config.output_type = HAL_GPIO_OUTPUT_PUSHPULL;
gpio_config.pull = HAL_GPIO_PULL_NO;
gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;
gpio_config.alternate = HAL_GPIO_AF_1;
HAL_GPIO_Init(HAL_GPIOA, HAL_GPIO_PIN_8, &gpio_config);
/* Enable Timer update interrupt */
HAL_CORTEX_NVIC_SetPriority(TIM1_UPD_IRQn, HAL_CORTEX_NVIC_PREEMP_PRIORITY_0, HAL_CORTEX_NVIC_SUB_PRIORITY_0);
HAL_CORTEX_NVIC_EnableIRQ(TIM1_UPD_IRQn);
/* Timer Capture/Compare 1 DMA Request Configuration */
if (HAL_DMA_Init(&hGPDMA1_CH0, HAL_GPDMA1_CH0) != HAL_OK)
{
return NULL;
}
HAL_RCC_GPDMA1_EnableClock();
hal_dma_direct_xfer_config_t xfer_cfg_tim1_cc1_dma;
xfer_cfg_tim1_cc1_dma.request = HAL_GPDMA1_REQUEST_TIM1_CC1;
xfer_cfg_tim1_cc1_dma.direction = HAL_DMA_DIRECTION_PERIPH_TO_MEMORY;
xfer_cfg_tim1_cc1_dma.src_inc = HAL_DMA_SRC_ADDR_FIXED;
xfer_cfg_tim1_cc1_dma.dest_inc = HAL_DMA_DEST_ADDR_FIXED;
xfer_cfg_tim1_cc1_dma.src_data_width = HAL_DMA_SRC_DATA_WIDTH_WORD;
xfer_cfg_tim1_cc1_dma.dest_data_width = HAL_DMA_DEST_DATA_WIDTH_WORD;
xfer_cfg_tim1_cc1_dma.priority = HAL_DMA_PRIORITY_LOW_WEIGHT_LOW;
if (HAL_DMA_SetConfigPeriphDirectXfer(&hGPDMA1_CH0, &xfer_cfg_tim1_cc1_dma) != HAL_OK)
{
return NULL;
}
/* Enable the interruption for GPDMA1_CH0 */
HAL_CORTEX_NVIC_SetPriority(GPDMA1_CH0_IRQn, HAL_CORTEX_NVIC_PREEMP_PRIORITY_0, HAL_CORTEX_NVIC_SUB_PRIORITY_0);
HAL_CORTEX_NVIC_EnableIRQ(GPDMA1_CH0_IRQn);
/* Link Capture/Compare 1 DMA request handle to the TIM handle */
if (HAL_TIM_SetDMA(&hTIM1, HAL_TIM_DMA_ID_CC1, &hGPDMA1_CH0) != HAL_OK)
{
return NULL;
}
return &hTIM1;
}
|
|
Deinitialization sequence function |
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM1)
{
/* Peripheral clock disable */
__HAL_RCC_TIM1_CLK_DISABLE();
/* TIM1 DMA DeInit */
HAL_DMA_DeInit(htim_base->hdma[TIM_DMA_ID_CC1]);
/* TIM1 interrupt DeInit */
HAL_NVIC_DisableIRQ(TIM1_UP_IRQn);
}
}
|
void mx_tim1_deinit(void)
{
(void)HAL_TIM_DeInit(&hTIM1);
HAL_RCC_TIM1_DisableClock();
HAL_RCC_TIM1_Reset();
/* De-initialize all GPIO pins associated with TIM1 */
HAL_GPIO_DeInit(HAL_GPIOA, HAL_GPIO_PIN_8);
#if defined(USE_HAL_GPIO_HSLV) && (USE_HAL_GPIO_HSLV == 1U)
HAL_GPIO_DisableHighSpeedLowVoltage(HAL_GPIOA, HAL_GPIO_PIN_8);
#endif /* USE_HAL_GPIO_HSLV */
/* Disable Timer update interrupt */
HAL_CORTEX_NVIC_DisableIRQ(TIM1_UPD_IRQn);
/* De-initialize the DMA channel */
HAL_DMA_DeInit(&hGPDMA1_CH0);
/* Disable the interruption for DMA */
HAL_CORTEX_NVIC_DisableIRQ(GPDMA1_CH0_IRQn);
}
|
|
IRQ handle function |
void TIM1_UP_IRQHandler(void)
{
HAL_TIM_IRQHandler(&htim1);
}
void GPDMA1_Channel0_IRQHandler(void)
{
HAL_DMA_IRQHandler(&handle_GPDMA1_Channel0);
}
|
void TIM1_UPD_IRQHandler(void)
{
HAL_TIM_UPD_IRQHandler(&hTIM1);
}
void GPDMA1_CH0_IRQHandler(void)
{
HAL_DMA_IRQHandler(&hGPDMA1_CH0);
}
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